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| CD4512BC 8-Channel Buffered Data Selector October 1987 Revised January 1999 CD4512BC 8-Channel Buffered Data Selector General Description The CD4512BC buffered 8-channel data selector is a complementary MOS (CMOS) circuit constructed with N- and P-channel enhancement mode transistors. This data selector is primarily used as a digital signal multiplexer selecting 1 of 8 inputs and routing the signal to a 3-STATE output. A high level at the Inhibit input forces a low level at the output. A high level at the Output Enable (OE) input forces the output into the 3-STATE condition. Low levels at both the Inhibit and (OE) inputs allow normal operation. Features s Wide supply voltage range: s High noise immunity: s 3-STATE output s Low quiescent power dissipation: 0.25 W/package (typ.) @ VCC = 5.0V s Plug-in replacement for Motorola MC14512 3.0V to 15V 0.45 VDD (typ.) Ordering Code: Order Number CD4512BCM CD4512BCN Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending suffix "X" to the ordering code. Connection Diagram Pin Assignments for SOIC and DIP Truth Table Address Inputs C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 1 2 A 0 1 0 1 0 1 0 1 1 2 Control Inputs Inhibit 0 0 0 0 0 0 0 0 1 2 OE 0 0 0 0 0 0 0 0 0 1 Output Z X0 X1 X2 X3 X4 X5 X6 X7 0 Hi-Z Top View 2 2 2 = Don't care Hi-Z = 3-STATE condition Xn = Data at input n (c) 1999 Fairchild Semiconductor Corporation DS005993.prf www.fairchildsemi.com CD4512BC Logic Diagram www.fairchildsemi.com 2 CD4512BC Absolute Maximum Ratings(Note 1) (Note 2) Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (P D) Dual-In-Line Small Outline Lead Temperature, (TL) (Soldering, 10 seconds) 260C 700 mW 500 mW -0.5 to +18 VDC -0.5 to VDD + 0.5 VDC -65C to +150C Recommended Operating Conditions (Note 2) DC Supply Voltage (V DD) Input Voltage (VIN) Operating Temperature Range (TA) 3.0 to 15 VDC 0 to VDD VDC -40C to +85C Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The Recommended Operating Conditions and Electrical Characteristics table provide conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified. DC Electrical Characteristics (Note 2) Symbol IDD Parameter Quiescent Device Current VOL LOW Level Output Voltage VOH HIGH Level Output Voltage VIL LOW Level Input Voltage VIH HIGH Level Input Voltage IOL LOW Level Output Current (Note 3) IOH HIGH Level Output Current (Note 3) IIN IOZ Input Current 3-STATE Output Current Conditions VDD = 5V, VIN = VDD or VSS VDD = 10V, VIN = VDD or VSS VDD = 15V, VIN = VDD or VSS VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V, VO = 0.5V VDD = 10V, VO = 1.0V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.5V VDD = 10V, VO = 9.0V VDD = 15V, VO = 13.5V VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5 VDD = 15V, V O = 13.5V VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V VDD = 15V, VO = 0V VDD = 15V, VO = 15V 3.5 7.0 11.0 0.52 1.3 3.6 -0.2 -0.5 -1.4 -0.3 0.3 1.0 |I OH| < 1 A 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 0.44 1.1 3.4 -0.16 -0.4 -1.2 -10-5 10-5 10 -5 -0.3 0.3 1.0 |IOL| < 1 A -40C Min Max 20 40 80 0.05 0.05 0.05 4.95 9.95 14.95 Min +25C Typ 0.005 0.010 0.015 0 0 0 5.0 10.0 15.0 2.25 4.50 6.75 2.75 5.50 8.25 0.78 2.0 7.8 1.5 3.0 4.0 3.5 7.0 11.0 0.36 0.9 2.4 -0.12 -0.3 -1.0 -1.0 1.0 7.5 Max 20 40 80 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 +85C Min Max 150 300 600 0.05 0.05 0.05 Units A A A V V V V V V V V V V V V mA mA mA mA mA mA A A A Note 3: IOH and IOL are tested one output at a time. 3 www.fairchildsemi.com CD4512BC AC Electrical Characteristics TA = 25C, tr = tf = 20 ns, CL = 50 pF Symbol tPHL Parameter Propagation Delay HIGH-to-LOW Level tPLH Propagation Delay LOW-to-HIGH Level tTHL, tTLH Transition Time VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V tPHZ, tPLZ Propagation Delay into 3-STATE from Logic Level tPZH, tPZL Propagation Delay to Logic Level from 3-STATE CIN COUT CPD Input Capacitance 3-STATE Output Capacitance Power Dissipation Capacity (Note 6) VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V (Note 5) (Note 5) (Note 4) CD4512BM Min Typ 225 75 57 225 75 57 70 35 25 50 25 19 50 25 19 7.5 7.5 150 Max 500 175 130 500 175 130 200 100 80 125 75 60 125 75 60 15 15 Min CD4512BC Typ 225 75 57 225 75 57 70 35 25 50 25 19 50 25 19 7.5 7.5 150 Max 750 200 150 750 200 150 200 100 80 125 75 60 125 75 60 15 15 Conditions Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF pF pF Note 4: AC Parameters are guaranteed by DC correlated testing. Note 5: Capacitance guaranteed by periodic testing. Note 6: CPD determines the no load AC power of any CMOS device. For complete explanation, see Family Characteristics Application Note, AN-90. www.fairchildsemi.com 4 CD4512BC Typical Application Serial Data Routing Interface AC Test Circuit and Switching Time Waveforms Input Connections for tr, tf, tPLH, tPHL Test 1 2 3 Inhibit PG GND GND A GND PG GND X0 VDD VDD PG 5 www.fairchildsemi.com CD4512BC 3-STATE AC Test Circuit and Switching Time Waveforms Switch Positions for 3-STATE Test Test tPHZ tPLZ tPZL tPZH S1 Open Closed Closed Open S2 Closed Open Open Closed S3 Closed Open Open Closed S4 Open Closed Closed Open www.fairchildsemi.com 6 CD4512BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Wide Package Number M16A 7 www.fairchildsemi.com CD4512BC 8-Channel Buffered Data Selector Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. |
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